One coherent stack.Five honest layers.
Quantum-O is not one breakthrough. It is a defined path from the monolithic die, through thermal isolation, through the classical host, into the runtime, and out to a managed cloud fallback. Each layer is engineered — and staged — separately.
What is built, what is engineered, what is staged.
Each layer carries an explicit maturity label. We do not describe a roadmap deliverable as a shipping product.
Q-O v1.0 monolithic die · SiV spin cores in ²⁸Si
The Q-O v1.0 monolithic die. SiV colour-centre spin qubits in isotopically purified ²⁸Si, with Majorana boundary shielding and on-chip Si₃N₄ photonic routing.
Fabricated on a standard CMOS-compatible flow with post-implant SiV activation. Cryo-CMOS control tier is co-integrated on the same substrate.
SiV centres, Majorana shielding, GDPE control
The foundational physics layer: SiV colour centres, Majorana boundary shielding, and the GDPE control formalism that governs gate synthesis and error suppression.
Characterised in published literature and reproduced in our simulation stack. The theoretical envelope is stable; the engineering task is translating it into a manufacturable control tier.
Open runtime · statevector engine · REST + CLI
Q-Ov1, an open runtime that compiles quantum circuits to the chipset's native gate set, and the Quantum SDK that lets developers author those circuits today.
The runtime is live in software emulation against a local simulator and against a hosted node tier. The compiler targets a stable QASM subset.
Circuit builder, algorithms, OpenQASM export
The Quantum SDK — a browser-native circuit builder, algorithm library, and OpenQASM export path that lets developers author against the runtime today.
Shipping in the portal. Compiles to the same QASM subset the runtime consumes, so code written against the SDK runs unchanged on the hosted node tier.
Quantum Centres · hybrid orchestration
Managed Quantum Centres that host physical chipsets and expose them as a hybrid compute service to enterprises whose host devices are not yet cryo-capable.
Standard cloud tenancy, queueing, and SLA. The Centre network is the near-term commercial vehicle; the on-device path is the long-term one.
The load-bearing engineering problem.
Consumer-adjacent quantum only becomes credible if the cryogenic package shrinks. We say so explicitly.
Required for SiV spin coherence at gate-fidelity targets.
Cryo-CMOS band. Decouples from the qubit plane via passive shielding.
Standard classical I/O to the operating system and network.